Slot Interrupt Status Register
INTR_SLOT | Interrupt Signal for each Slot. These status bits indicate the logical OR of interrupt signal and wakeup signal for each slot. A maximum of 8 slots can be defined. If one interrupt signal is associated with multiple slots, the Host Driver can identify the interrupt that is generated by reading these bits. By a power on reset or by setting the SDMMC_SW_RST_R[SW_RST_ALL] bit, the interrupt signals are de-asserted and this status reads 0x0. Bit 00: Slot 1 Bit 01: Slot 2 Bit 02: Slot 3 Bit 07: Slot 8 |